GraphSys '26 also features three high-impact challenges that steer research toward causal and temporal reasoning in parallel and distributed systems. We invite submissions that push the boundaries of the field – whether through foundational vision papers, the release of novel datasets, benchmarks, or rigorous academic and industrial advancements addressing our three core challenges. Extended abstracts (2 pages) addressing one or more of the challenges are welcome in addition to full and short papers.
Challenge 1: Causal discovery in HPC and datacenter management
We focus on how causal relationships can be discovered, inferred, and leveraged for HPC and datacenter management. We welcome research on:
- Causal modeling and reasoning
- Causal inference
- Causal explainable artificial intelligence
Understanding not only what correlates with performance or failures but why it does is essential for robust resource management, scheduling, and root-cause analysis at scale. Causal discovery in this setting can inform capacity planning, fault tolerance, and energy optimization.
Example datasets
- M100 ExaData (CINECA Marconi100) – holistic monitoring data (management, workload, facility, and infrastructure) from the Marconi100 Tier-0 supercomputer, collected via the ExaMon framework.
- Google cluster data – traces of jobs, machine states, and resource usage from production Google compute clusters, widely used for systems and scheduling research.
Challenge 2: Causal understanding of quantum uncertainty
We focus on how processing information from quantum computations could be leveraged to discover causal relationships between qubit failures and the events that lead to them. Modeling these as causal structures rather than purely statistical phenomena can guide better error mitigation, calibration, and system design.
Challenge 3: Causal hardware–software co-design
We focus on understanding causal relationships between hardware design (components and layout) and how these affect processing capabilities at the software level. Rather than treating hardware and software in isolation, we aim to foster work that explicitly models and reasons about cause–effect links: for example, how layout, memory hierarchy, or interconnect design causally influence throughput, latency, or energy. This perspective is still underexplored and can be highly innovative, bringing together architecture, systems, and causal reasoning communities.
Submission types for the challenges
- Extended abstracts (2 pages): directly addressing one or more of the challenges; ideal for vision papers or early-stage ideas.
- Full papers (10–12 pages) and short papers (6 pages): we welcome both methodological and applied contributions that tackle these challenges with concrete models, algorithms, or empirical results.
- Datasets: we encourage the submission or dissemination of FAIR datasets that support causal and temporal analysis related to the abovementioned challenges.
For full submission details and important dates, see the Call for Papers.